![Digital Design with Verilog (R) HDL: (Formerly titled "Hardware Modeling with Verilog HDL") by Elizer Sternheim 9780962748806](https://cdn11.bigcommerce.com/s-zkx5lhzlf8/images/stencil/1500x1500/products/5216902/5294163/9780962748806__54073.1724697574.jpg?c=1?imbypass=on "Digital Design with Verilog (R) HDL: (Formerly titled "Hardware Modeling with Verilog HDL") by Elizer Sternheim 9780962748806")
![Digital Design with Verilog (R) HDL: (Formerly titled "Hardware Modeling with Verilog HDL") by Elizer Sternheim 9780962748806](https://cdn11.bigcommerce.com/s-zkx5lhzlf8/images/stencil/608x608/products/5216902/5294163/9780962748806__54073.1724697574.jpg?c=1 "Digital Design with Verilog (R) HDL: (Formerly titled "Hardware Modeling with Verilog HDL") by Elizer Sternheim 9780962748806")
Description
Verilog HDL is the standard hardware description language for the design of digital systems and VLSI devices. This volume shows designers how to describe pieces of hardware functionally in Verilog using a top-down design approach, which is illustrated with a number of large design examples. The work is organized to present material in a progressive manner, beginning with an introduction to Verilog HDL and ending with a complete example of the modelling and testing of a large subsystem.
Book Information
ISBN 9780962748806
Author Elizer Sternheim
Format Paperback
Page Count 217
Imprint Kluwer Academic Publishers
Publisher Kluwer Academic Publishers Group
Weight(grams) 415g
Book Information
ISBN 9780962748806
Author Elizer Sternheim
Format Paperback
Page Count 217
Imprint Kluwer Academic Publishers
Publisher Kluwer Academic Publishers Group
Weight(grams) 415g
