In this book, internationally recognized researchers give a state-of-the-art overview of the electronic device architectures required for the nano-CMOS era and beyond. Challenges relevant to the scaling of CMOS nanoelectronics are addressed through different core CMOS and memory device options in the first part of the book. The second part reviews new device concepts for nanoelectronics beyond CMOS. The book covers the fundamental limits of core CMOS, improving scaling by the introduction of new materials or processes, new architectures using SOI, multigates and multichannels, and quantum computing.

Book Information
ISBN 9789814241281
Author Simon Deleonibus
Format Hardback
Page Count 425
Imprint Pan Stanford Publishing Pte Ltd
Publisher Pan Stanford Publishing Pte Ltd
Weight(grams) 816g