This book covers one of the most important device architectures that have been widely researched to extend the transistor scaling: FinFET. Starting with theory, the book discusses the advantages and the integration challenges of this device architecture. It addresses in detail the topics such as high-density fin patterning, gate stack design, and source/drain engineering, which have been considered challenges for the integration of FinFETs. The book also addresses circuit-related aspects, including the impact of variability on SRAM design, ESD design, and high-T operation. It discusses a new device concept: the junctionless nanowire FET.

Book Information
ISBN 9789814364027
Author Nadine Collaert
Format Hardback
Page Count 438
Imprint Pan Stanford Publishing Pte Ltd
Publisher Pan Stanford Publishing Pte Ltd
Weight(grams) 771g